pn240318120533 #Start recording tcl command: 3/18/2024 11:03:25 #Project Location: /media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201; Project name: lpddr4_axi_201 prj_create -name "lpddr4_axi_201" -impl "impl_1" -dev LFCPNX-100-9BBG484C -performance "9_High-Performance_1.0V" -synthesis "lse" prj_save prj_add_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/mem.ipx" prj_add_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/constraints/mem.ldc" prj_add_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/eval/eval_top.sv" prj_add_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/eval/constraint.pdc" prj_add_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/eval/clock_constraint.sdc" prj_enable_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/eval/clock_constraint.sdc" prj_enable_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/constraints/mem.ldc" prj_run Synthesis -impl impl_1 prj_run Map -impl impl_1 prj_run Map -impl impl_1 prj_run PAR -impl impl_1 prj_run Export -impl impl_1 prj_save prj_close #Stop recording: 3/18/2024 12:05:33 pn240318142507 #Start recording tcl command: 3/18/2024 12:26:19 #Project Location: /media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201; Project name: lpddr4_axi_201 prj_open "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/lpddr4_axi_201.rdf" prj_add_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/constraint_201.pdc" prj_remove_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/mem/eval/constraint.pdc" prj_enable_source "/media/d480/GitHubProjects/TssTechnique/TssProjects/TssSemaDuinoQualif/td201_221014/lpddr4_axi/lpddr4_axi_201/constraint_201.pdc" prj_save prj_run PAR -impl impl_1 prj_run Export -impl impl_1 prj_close #Stop recording: 3/18/2024 14:25:07