Synthesis Resource Usage

#Synthesis Resource Utilization Report file generated by Lattice Radiant Software (64-bit) 2025.1.1.308.0
#Generated on 04/02/26 14:39:32
#DESIGN = lpddr4_axi_201
#DEVICE = LFCPNX-100
#PACKAGE = BBG484
#OPERATINGCONDITION = Commercial
#PERFORMANCEGRADE = 9_High-Performance_1.0V

	LUT4	PFU Registers	IO Buffers	EBR	DRAM	Carry Cells
eval_top	13172(34)	10745(11)	58(19)	41(0)	181(0)	1178(0)
ASYNC_AXI.u_aclk_pclk	0(0)	0(0)	0(0)	0(0)	0(0)	0(0)
lscc_pll_inst	0(0)	0(0)	0(0)	0(0)	0(0)	0(0)
kitcar_inst	41(41)	32(32)	0(0)	0(0)	0(0)	23(23)
kitcar_inst2	34(34)	32(32)	0(0)	0(0)	0(0)	28(28)
osc_int_inst	0(0)	0(0)	0(0)	0(0)	0(0)	0(0)
lscc_osc_inst	0(0)	0(0)	0(0)	0(0)	0(0)	0(0)
u_mem	9722(0)	7844(0)	29(0)	25(0)	143(0)	845(0)
lscc_lpddr4_mc_inst	9722(87)	7844(421)	29(0)	25(0)	143(0)	845(0)
AXI_BI.u_axi_if	902(0)	1503(0)	0(0)	4(0)	71(0)	186(0)
u_rd	421(65)	806(107)	0(0)	4(0)	19(0)	171(5)
ASYNC.u_ctrl_fifo	25(0)	74(0)	0(0)	0(0)	13(0)	0(0)
u_fifo_dc	25(25)	74(74)	0(0)	0(0)	13(13)	0(0)
u_reorder_buff	331(331)	625(546)	0(0)	4(0)	6(0)	166(166)
EBR_CTRL[0].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[0].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[1].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[1].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[2].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[2].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[3].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[3].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[4].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[4].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[5].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[5].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[6].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[6].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[7].ASYNC.u_enable_bus_sync	0(0)	5(5)	0(0)	0(0)	0(0)	0(0)
EBR_CTRL[7].ASYNC.u_not_empty_sync	0(0)	2(2)	0(0)	0(0)	0(0)	0(0)
u_ctrl_dpram	0(0)	23(0)	0(0)	0(0)	6(0)	0(0)
lscc_distributed_dpram_inst	0(0)	23(23)	0(0)	0(0)	6(6)	0(0)
u_lpddr4_mc_rd_rtrn_ebr_inst	0(0)	0(0)	0(0)	4(0)	0(0)	0(0)
lscc_ram_dp_inst	0(0)	0(0)	0(0)	4(0)	0(0)	0(0)
mem_main	0(0)	0(0)	0(0)	4(0)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[0].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[1].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[2].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[3].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
u_wr	481(319)	697(348)	0(0)	0(0)	52(0)	15(15)
ASYNC.u_ctrl_fifo	36(36)	68(68)	0(0)	0(0)	12(12)	0(0)
ASYNC.u_data_fifo	70(0)	188(0)	0(0)	0(0)	37(0)	0(0)
u_fifo_dc	70(70)	188(188)	0(0)	0(0)	37(37)	0(0)
u_int_fifo	27(0)	48(0)	0(0)	0(0)	2(0)	0(0)
u_fifo	27(27)	48(48)	0(0)	0(0)	2(2)	0(0)
u_rsp_fifo	29(0)	45(0)	0(0)	0(0)	1(0)	0(0)
u_fifo	29(29)	45(45)	0(0)	0(0)	1(1)	0(0)
u_ctrl_wrap	8593(8546)	5832(5734)	0(0)	21(0)	72(40)	649(641)
u_controller.u_rd_rtrn.rdrtrnctrlfifo_inst.u_fifo	35(35)	98(98)	0(0)	0(0)	32(32)	8(8)
u_controller.u_sch.u_sch_wr_data_handler_inst.u_lpddr4_mc_storage_byte_en_inst	0(0)	0(0)	0(0)	1(0)	0(0)	0(0)
lscc_ram_dp_inst	0(0)	0(0)	0(0)	1(0)	0(0)	0(0)
mem_main	0(0)	0(0)	0(0)	1(0)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[0].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
u_controller.u_sch.u_sch_wr_data_handler_inst.u_lpddr4_mc_storage_data_inst	0(0)	0(0)	0(0)	4(0)	0(0)	0(0)
lscc_ram_dp_inst	0(0)	0(0)	0(0)	4(0)	0(0)	0(0)
mem_main	0(0)	0(0)	0(0)	4(0)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[0].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[1].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[2].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
NON_MIX.ADDR_ROUTE[0].DATA_ROUTE[3].no_init.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
u_controller.u_trn_eng.CPU_EN.i_cpu_grp.LP4.i_sys_mem.lscc_sys_mem_inst.u_lscc_mem0.lifcl.ebr.dp.u_mem	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
mem_main	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
uinst_0	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[0].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[10].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[11].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[12].mem_file.u_dp16k	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[13].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[14].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[15].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[1].mem_file.u_dp16k	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[2].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[3].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[4].mem_file.u_dp16k	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[5].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[6].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[7].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[8].mem_file.u_dp16k	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[9].mem_file.u_dp16k	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
u_controller.u_trn_eng.CPU_EN.i_cpu_grp.i_iahbl_int_1x2.lscc_ahbl_interconnect_inst.ahb_lite_bus.u_lscc_ahbl_bus.u_lscc_ahbl_decoder.genblk1[1].u_lscc_ahbl_decoder_sel.genblk1[0].u_lscc_ahbl_decoder_comp	8(8)	0(0)	0(0)	0(0)	0(0)	0(0)
u_lp4mem	140(61)	88(11)	29(0)	0(0)	0(0)	10(5)
CA_GRP_ENA.u_ca_grp	15(15)	24(24)	9(9)	0(0)	0(0)	5(5)
u1_clock_sync	63(0)	53(0)	0(0)	0(0)	0(0)	0(0)
u1_mem_sync	63(63)	53(53)	0(0)	0(0)	0(0)	0(0)
u_dq_dqs_dm	0(0)	0(0)	20(20)	0(0)	0(0)	0(0)
u_pll	1(1)	0(0)	0(0)	0(0)	0(0)	0(0)
u_tragen	3341(36)	2826(0)	10(0)	16(0)	38(0)	282(0)
IMPL.sysmem0_inst	161(0)	56(0)	0(0)	16(0)	0(0)	8(0)
lscc_sys_mem_inst	161(147)	56(50)	0(0)	16(0)	0(0)	8(8)
bridge_s0.bridge_s0	10(10)	6(6)	0(0)	0(0)	0(0)	0(0)
u_lscc_mem0	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
lifcl_LATG1.ebr.dp.LIFCL.u_mem	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
mem_main	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
uinst_0	4(0)	0(0)	0(0)	16(0)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[0].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[10].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[11].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[12].mem_file.u_mem0	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[13].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[14].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[15].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[1].mem_file.u_mem0	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[2].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[3].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[4].mem_file.u_mem0	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[5].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[6].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[7].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[8].mem_file.u_mem0	1(1)	0(0)	0(0)	1(1)	0(0)	0(0)
prim.NON_MIX.xADDR[0].xDATA[9].mem_file.u_mem0	0(0)	0(0)	0(0)	1(1)	0(0)	0(0)
ahbl0_inst	95(0)	6(0)	0(0)	0(0)	0(0)	0(0)
lscc_ahbl_interconnect_inst	95(0)	6(0)	0(0)	0(0)	0(0)	0(0)
ahb_lite_bus.u_lscc_ahbl_bus	95(0)	6(0)	0(0)	0(0)	0(0)	0(0)
u_lscc_ahbl_decoder	14(13)	0(0)	0(0)	0(0)	0(0)	0(0)
genblk1[1].u_lscc_ahbl_decoder_sel	1(0)	0(0)	0(0)	0(0)	0(0)	0(0)
genblk1[0].u_lscc_ahbl_decoder_comp	1(1)	0(0)	0(0)	0(0)	0(0)	0(0)
u_lscc_ahbl_default_slv	2(2)	2(2)	0(0)	0(0)	0(0)	0(0)
u_lscc_ahbl_multiplexor	79(79)	4(4)	0(0)	0(0)	0(0)	0(0)
ahbl2apb0_inst	272(0)	107(0)	0(0)	0(0)	0(0)	0(0)
lscc_ahbl2apb_inst	272(272)	107(107)	0(0)	0(0)	0(0)	0(0)
apb0_inst	65(0)	5(0)	0(0)	0(0)	0(0)	0(0)
lscc_apb_interconnect_inst	65(0)	5(0)	0(0)	0(0)	0(0)	0(0)
apb_bus.u_lscc_apb_bus	65(0)	5(0)	0(0)	0(0)	0(0)	0(0)
u_lscc_apb_decoder	15(5)	0(0)	0(0)	0(0)	0(0)	0(0)
genblk1[1].u_lscc_apb_decoder_sel	1(0)	0(0)	0(0)	0(0)	0(0)	0(0)
genblk1[0].u_lscc_apb_decoder_comp	1(1)	0(0)	0(0)	0(0)	0(0)	0(0)
genblk1[3].u_lscc_apb_decoder_sel	9(0)	0(0)	0(0)	0(0)	0(0)	0(0)
genblk1[0].u_lscc_apb_decoder_comp	9(9)	0(0)	0(0)	0(0)	0(0)	0(0)
u_lscc_apb_multiplexor	50(50)	5(5)	0(0)	0(0)	0(0)	0(0)
axi_tragen_inst	1510(0)	1662(0)	0(0)	0(0)	6(0)	180(0)
u_axi_m_csr	332(332)	721(721)	0(0)	0(0)	0(0)	5(5)
u_axi_m_rd	563(338)	392(153)	0(0)	0(0)	3(0)	45(45)
LFSR16[0].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[1].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[2].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[3].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[4].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[5].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[6].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[7].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
u_a2d_fifo	36(0)	58(0)	0(0)	0(0)	3(0)	0(0)
lscc_fifo_inst	36(0)	58(0)	0(0)	0(0)	3(0)	0(0)
fifo0	36(0)	58(0)	0(0)	0(0)	3(0)	0(0)
_FABRIC.u_fifo	36(36)	58(58)	0(0)	0(0)	3(3)	0(0)
u_araddr_gen	33(33)	32(32)	0(0)	0(0)	0(0)	0(0)
u_ctrl_gen	20(20)	21(21)	0(0)	0(0)	0(0)	0(0)
u_axi_m_wr	449(235)	374(135)	0(0)	0(0)	3(0)	45(45)
LFSR16[0].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[1].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[2].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[3].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[4].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[5].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[6].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
LFSR16[7].u_wdata_gen	17(17)	16(16)	0(0)	0(0)	0(0)	0(0)
u_a2d_fifo	32(0)	58(0)	0(0)	0(0)	3(0)	0(0)
lscc_fifo_inst	32(0)	58(0)	0(0)	0(0)	3(0)	0(0)
fifo0	32(0)	58(0)	0(0)	0(0)	3(0)	0(0)
_FABRIC.u_fifo	32(32)	58(58)	0(0)	0(0)	3(3)	0(0)
u_awaddr_gen	32(32)	32(32)	0(0)	0(0)	0(0)	0(0)
u_ctrl_gen	14(14)	21(21)	0(0)	0(0)	0(0)	0(0)
u_axi_perf_calc	166(166)	175(175)	0(0)	0(0)	0(0)	85(85)
cpu0_inst	796(764)	640(609)	0(0)	0(0)	32(32)	76(76)
i_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c	32(32)	31(31)	0(0)	0(0)	0(0)	0(0)
gpio0_inst	114(0)	121(0)	10(0)	0(0)	0(0)	0(0)
lscc_gpio_inst	114(0)	121(0)	10(0)	0(0)	0(0)	0(0)
LxxNX.lscc_gpio_lmmi_0	79(79)	90(90)	10(10)	0(0)	0(0)	0(0)
genblk2.lscc_apb2lmmi_0	35(35)	31(31)	0(0)	0(0)	0(0)	0(0)
memc_apb_inst	2(0)	79(0)	0(0)	0(0)	0(0)	0(0)
lscc_apb_feedthrough_inst	2(2)	79(79)	0(0)	0(0)	0(0)	0(0)
uart0_inst	290(0)	150(0)	0(0)	0(0)	0(0)	18(0)
lscc_uart_inst	290(0)	150(0)	0(0)	0(0)	0(0)	18(0)
u_intface	31(31)	50(50)	0(0)	0(0)	0(0)	0(0)
u_rxcver	117(117)	57(57)	0(0)	0(0)	0(0)	9(9)
u_txmitt	142(142)	43(43)	0(0)	0(0)	0(0)	9(9)