Lpddr4_axi_201 Project Summary
Implementation Name: | impl_1 | Performance Grade: | 9_High-Performance_1.0V
Strategy Name: | Strategy1 | Operating Condition: | COM
Part Number: | LFCPNX-100-9BBG484C | Synthesis: | Lattice LSE
Family: | LFCPNX | Timing Errors: | Place & Route, 259 (Setup), 19 (Hold)
Device: | LFCPNX-100 | Project Created: |
Package: | BBG484 | Project Updated: | 2024/03/18 12:31:07
Project File: | /mnt/d500/proj/tss/Modules/TssTD201Qualif/td201_221014/lpddr4_lattice/lpddr4_axi_201/lpddr4_axi_201.rdf
Implementation Location: | /mnt/d500/proj/tss/Modules/TssTD201Qualif/td201_221014/lpddr4_lattice/lpddr4_axi_201/impl_1

Resource Usage
LUT4: | 18915/79872 (23.682%) | IO Buffers: | 58/299 (19.398%)
PFU Register: | 10708/79872 (13.406%) | EBR: | 41/208 (19.712%)

Lpddr4_axi_201 Constraints Dropped Summary
Synthesis: | 0 | Post Synthesis: | 0
Map: | 24 | Place & Route: | 0

IP Summary
IP Name | Vendor | IP Module Name | Version | License Feature | License Status
memory_controller | latticesemi.com | mem | 2.1.0 | LSC_IP_SC_HT_lpddr4_mc_cpnx | Failure